FRCL based Runtime Verification of Inner Cores for networks

FRCLe based Runtime Verification of Inner Cores for networks

High throughput, low latency and high system availability are the most important criteria for an internet router. Internet Router’s complexity has been on constant rise to serve the exploding internet backbone. With rise in design complexity comes the increased possibility of bugs escaping into silicon and affecting the user at runtime. In this project we implement a verilog-based learning rout...

Runtime verification of programs using rule-based active system

Rethinking Runtime Verification on Hundreds of Cores: Challenges and Opportunities

We propose a novel approach for runtime monitoring and verification on computers with a large number of computation cores. The goal of the approach is to minimize the impact of runtime verification on the performance of the application being monitored. We distinguish between two kinds of computational overhead: (i) overhead caused by instrumentation and/or logging, and (ii) parallelizable overh...

KUDA: GPU Accelerated Split Race Checker

We propose a novel approach for runtime verification on computers with a large number of computation cores, without any hardware extension to mainstream PC environment. The goal of the approach is making use of all hardware resources to decouple the computational overhead of traditional race checkers via parallelizing the runtime verification. We distinguish between two kinds of computational o...

On the Runtime Enforcement of Evolving Privacy Policies in Online Social Networks

Online Social Networks have increased the need to understand well and extend the expressiveness of privacy policies. In particular, the need to be able to define and enforce dynamic (and recurrent) policies that are activated or deactivated by context (events) or timeouts. We propose an automaton-based approach to define and enforce such policies using runtime verification techniques. In this p...